1. Field of the Invention
The present invention relates to a circuit arrangement for generating a clock signal which is synchronous in respect of frequency to a supplied reference frequency, comprising a reference frequency receiving component which receives an external signal having a reference frequency and which is connected to a first input of a first phase comparator, the first phase comparator being connected by way of an integrator to a first filter and the first filter being connected to a following voltage-controlled oscillator which emits the frequency-synchonrous clock signal to the output of the circuit arrangement and to a second input of the first phase comparator.
2. Description of the Prior Art
In specific transmission devices, clock signals must be generated in dependence upon a supplied reference frequency. The frequency of the clock signal is equal to the reference frequency, or the clock signal frequency bears a different fixed mathematical ratio to the reference frequency. Disturbances in the reference frequency which occur on the transmission link, for example, due to temperature influences or electromagnetic influences, are to influence the generated clock signal to the least possible extent.
In order to generate a clock signal which is frequency-synchronous to a reference frequency, and in order to suppress disturbances in the reference frequency, the usual practice is to employ phase-regulating circuits including an oscillator. Here, the pull-in range of the circuit arrangement which generates the clock signal is limited to the pull-range of the oscillator used in the phase-regulating circuit. In the case of highly-stable oscillators, which are desirable per se, the pull-range is very small; normally it is only slightly larger than the actual inaccuracy.
Circuit arrangements are also known which employ a less stable oscillator with a wide pull-in range and a highly-stable oscillator. In the event of the failure of the reference frequency, a transfer takes place from the less-stable oscillator with the wide pull-in range to the highly-stable oscillator with the small pull-in range. These circuit arrangements are limited to applications in which the reference frequency changes only with in a small fluctuation range. Because the transfer from the less-stable oscillator to the highly-stable oscillator results in a frequency jump which destroys the frequency synchronism between the last-supplied reference frequency and the new clock signal.